Research - Faculty
Assistant Professor Xiaoming Li
Machine Learning Based Library Generation Techniques for Multi-core Processors and GPUs
Overview
Current Projects
- Context-Aware and Context-Adaptive Code Optimization for New General High-performance Computers
- Intelligent Profiling and Code Generation Techniques for Multi-core Processors
- Machine Learning Based Library Generation Techniques for Multi-core Processors and GPUs
Current funding
NSF
Group Staff
Graduate Student
Jakob Siegel
Ryan Taylore
Office: Evans 201D
Phone: 302-831-0334
Adaptive library generators that emerged during the last decade are the first systems that can automatically produce efficient implementations across a wide range of platforms. All library generators accomplish their goals by applying empirical search to select the fastest version for the library over a space of computational equivalent algorithms and implementations for each machine design. Multi-core processors and general purpose Graphic Processing Units (GPUs) are two emerging platforms for high performance computation.
Developing highly efficient libraries for the new architectures are necessary for them to be readily accessible to general users. However, the approaches used in current library generators can not be easily ported to new architectures. First, existing library generators do not have a principled strategy to define the program design space for the new parallel architectures.
Second, the search mechanism employed in those generators, which blindly minimizes execution time, seriously lacks the capabilities to search in a significantly expanded search space, which is a natural result of more design choices in multi-core processors and GPUs. This research project seeks to break these limitations of the existing library generators and develop new machine learning based library generation techniques for multi-core processors and GPUs.
Recent publications
Daniel Orozco, Liping Xue, Murat Bolat, Xiaoming Li, Guang R. Gao "Experience of Optimizing FFT on Intel Architectures" Workshop on Performance Optimization for High-Level Languages and Libraries, in conjunction with 21st IEEE International Parallel & Distributed Processing Symposium (IPDPS), March 2007
